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art
art
test
Integration
test_tiered_input_04
fcl
make_f22.fcl
Go to the documentation of this file.
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process_name: DROPM1A
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source: {
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module_type: RootInput
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fileNames: [ "../test_tiered_input_04a2_t.d/f12.root" ]
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}
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outputs: {
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out1: {
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module_type: RootOutput
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fileName: "f22.root"
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outputCommands: [ "keep *", "drop arttest::IntProduct_m1a__MAKET1" ]
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}
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}
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physics: {
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e1: [ out1 ]
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}
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