mergewirecellmodule.fcl
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1 BEGIN_PROLOG
2 
3 standard_mergewirecell:
4 {
5  module_type: "MergeWireCell"
6  WireCellInput: "/lbne/app/users/tjyang/larsoft_mydev/job/wirecell/root"
7 }
8 
9 END_PROLOG
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