make_f2.fcl

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source: {
  module_type: RootInput
  fileNames: [ "../test_tiered_input_03a1_t.d/f11.root",
               "../test_tiered_input_03a2_t.d/f12.root",
               "../test_tiered_input_03a3_t.d/f13.root" ]
}

outputs: {
  out1: {
    module_type: RootOutput
    fileName: "f2.root"
    outputCommands: [ "keep *", "drop arttest::IntProduct_m1a__MAKET1" ]
  }
}

physics: {
  producers: {
  }
  filters: {
  }
  p1: [ ]
  trigger_paths: [ p1 ]
  analyzers: {
  }
  e1: [ out1 ]
  end_paths: [ e1 ]
}

process_name: DROPM1A